The invention relates to a method for controlling a Vienna rectifier, also known as a three-phase three-level PWM rectifier. A description of the Vienna rectifier may be found e.g. in EP 0 660 498 A2.
The following discussion of related art is provided to assist the reader in understanding the advantages of the invention, and is not to be construed as an admission that this related art is prior art to this invention.
In contrast to conventional six-pulse bridge circuits (B6) used for rectifying 3-phase alternating current, a Vienna rectifier is known to be characterized by a significantly lower harmonic content on the AC voltage side. Because of an approximately sinusoidal current waveform, a smaller line filter is sufficient particularly at higher powers and less space is therefore required for the Vienna rectifier. This must be set against a comparatively complex/costly electronic control circuit which controls the Vienna rectifier by pulse width modulation (PWM).
For controlling a Vienna rectifier or an active rectifier in general—hereinafter referred to as a rectifier for short—a pulse pattern for controlling a power semiconductor is required. A preceding control system outputs a voltage vector having an angle and an amplitude. Just as in space vector modulation, sectors can be defined in which the voltage vector can move. Although the switching states at the vertices of the respective sectors are known, the switching times must now also be determined for the voltage vector. In addition, for the relevant voltage vector another associated subsector must be determined, since, compared to space vector modulation, in the case of the two-level inverter there are not only six, but a total of 24 sectors.
It would therefore be desirable and advantageous to obviate prior art shortcomings and to provide an improved method for controlling the Vienna rectifier, i.e. a particularly efficient trigger set. The method with improved efficiency may be implemented in software, firmware or a combination of software and firmware, being as resource-saving as possible and resulting in a comparatively minimal execution time of the method running continuously in a fixed time pattern in each clock cycle.